According to industry sources, TSMC is planning to introduce a 12 nanometer half-node process to enhance competition with 28nm and lower process nodes that have been adopted over the past few years.
UMC Q2 2026 earnings beat forecasts with $2.12B revenue, 85% utilization, and 32.5% gross margin. CEO Jason Wang confirmed ...
LAWRENCEVILLE, Ga.--(BUSINESS WIRE)--Silicon Creations, a leading provider of precision IP for advanced SoC design, today announced its 1000th production FinFET tapeout at TSMC, alongside the ...
Imec, headquartered in Leuven, Belgium, has successfully demonstrated the first III-V compound semiconductor FinFET devices integrated epitaxially on 300 mm silicon wafers, through a unique silicon ...